April 21-23
May 19-21
June 16-18
July 14-16
August 18-20
September 15-17
October 20-22
November 17-19
Register Now
May 19-21
June 16-18
July 14-16
August 18-20
September 15-17
October 20-22
November 17-19
Register Now
Enjoy the wonderful Southern California weather as you learn about Jtag / boundary-scan concepts and best practices, including:
- Introduction to boundary-scan
- Design for boundary-scan testability guidelines
- Design for boundary-scan In-System Programming Strategy
- Test generation and testing methods for boundary-scan-based designs
- At-speed embedded functional testing using an on-board JTAG-based CPU
- In-system programming of CPLDs and Flash memories tutorial
- Hands-on individual lab exercises using real Units Under Test (UUTs)
Call or e-mail Corelis Training ([email protected], +1 (562) 926-6727) today to reserve your spot, or sign up online.
