Virtual Memory, Address Spaces And Mapping

The system's virtual memory (VM) consists of all available physical memory resources. Examples include local and remote file systems, processor primary memory, swap space, and other random-access devices.
A process's address space is defined by mappings onto objects in the system's virtual memory (usually files). Each mapping is constrained to be sized and aligned with the page boundaries of the system on which the process is executing. Each page may be mapped (or not) independently. Only process addresses, which are mapped to some system objects, are valid, for there is no memory associated with processes themselves--all memory is represented by objects in the system's virtual memory.
Each object in the virtual memory has an object address space defined by some physical storage. A reference to an object address accesses the physical storage that implements the address within the object. The virtual memory's associated physical storage is thus accessed by transforming process addresses to object addresses, and then to the physical store.
A given process page may map to only one object, although a given object address may be the subject of many process mappings. An important characteristic of a mapping is that the object to which the mapping is made is not affected by the mere existence of the mapping. Thus, it cannot, in general, be expected that an object has an ``awareness'' of having been mapped, or of which portions of its address space are accessed by mappings; in particular, the notion of a ``page'' is not a property of the object. Establishing a mapping to an object simply provides the potential for a process to access or change the object's contents.
The establishment of mappings provides an access method that renders an object directly addressable by a process. Applications may find it advantageous to access the storage resources they use, directly, rather than indirectly through read and write.
Cache Memory
With increasing clock speeds for modern CPUs, the disparity between the CPU speed and the access speed for RAM has grown substantially. Consider the following:
• Typical CPU speed today: 250-500MHz (which translates into 4-2ns clock tick)
• Typical memory access speed (for regular DRAM): 60ns
• Typical disk access speed: 13ms
In other words, to get a piece of information from RAM, the CPU has to wait for 15-30 clock cycles, a considerable waste of time.
Fortunately, cache RAM has come to the rescue. The RAM cache is simply a small amount of very fast (and thus expensive) memory, which is placed between the CPU and the (slower) RAM. When the kernel loads a page from RAM for use by the CPU, it also prefetches a number of adjacent pages and stores them in the cache. Since programs typically use sequential memory access, the next page needed by the CPU can now be supplied very rapidly from the cache. Updates of the cache are performed using an efficient algorithm which can enable cache hit rates of nearly 100% (with a 100% hit ratio being the ideal case).
CPUs today typically have hierarchical caches. The on-chip cache (usually called the L1 cache) is small but fast (being on-chip). The secondary cache (usually called the L2 cache) is often not on-chip (thus a bit slower) and can be quite large, sometimes as big as 16MB for high-end CPUs (obviously, you have to pay a hefty premium for a cache that size).




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